6111 search results - page 1035 / 1223 » Time, Hardware, and Uniformity |
204
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MICRO
2002
IEEE
15 years 11 months ago
2002
IEEE
Pre-execution attacks cache misses for which conventional address-prediction driven prefetching is ineffective. In pre-execution, copies of cache miss computations are isolated fr...
169
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SIGMETRICS
2010
ACM
15 years 11 months ago
2010
ACM
In this paper, we consider a generic model of computational grids, seen as several clusters of homogeneous processors. In such systems, a key issue when designing efficient job al...
160
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EUROPAR
2009
Springer
15 years 11 months ago
2009
Springer
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
173
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ICS
2001
Tsinghua U.
15 years 11 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
173
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ICCAD
2000
IEEE
15 years 11 months ago
2000
IEEE
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...