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MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
16 years 17 days ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas
RTCSA
2006
IEEE
16 years 17 days ago
objSampler: A Ubiquitous Logging Tool for Recording Encounters with Real World Objects
We propose a novel tool, called objSampler, with which users can record and recall “encounters” with objects in ubiquitous computing environments. We encounter various things,...
Jun'ichi Yura, Hideaki Ogawa, Taizo Zushi, Jin Nak...
CF
2006
ACM
16 years 16 days ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
16 years 16 days ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
ISPD
2006
ACM
158views Hardware» more  ISPD 2006»
16 years 16 days ago
Effective linear programming based placement methods
Linear programming (LP) based methods are attractive for solving the placement problem because of their ability to model Half-Perimeter Wirelength (HPWL) and timing. However, it h...
Sherief Reda, Amit Chowdhary
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