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ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
16 years 1 months ago
Area-I/O flip-chip routing for chip-package co-design
— The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, an...
Jia-Wei Fang, Yao-Wen Chang
ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
16 years 1 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
ISCA
2008
IEEE
112views Hardware» more  ISCA 2008»
16 years 1 months ago
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
Onur Mutlu, Thomas Moscibroda
ISCA
2008
IEEE
142views Hardware» more  ISCA 2008»
16 years 1 months ago
Improving NAND Flash Based Disk Caches
Flash is a widely used storage device that provides high density and low power, appealing properties for general purpose computing. Today, its usual application is in portable spe...
Taeho Kgil, David Roberts, Trevor N. Mudge
ISCAS
2008
IEEE
134views Hardware» more  ISCAS 2008»
16 years 1 months ago
Bidirectionally decodable Wyner-Ziv video coding
Abstract— Inter frame prediction technique significantly improves the compression efficiency in the hybrid video coding schemes. However, this technique causes the decoding dep...
Xiaopeng Fan, Oscar C. Au, Yan Chen, Jiantao Zhou,...
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