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MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
16 years 1 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
16 years 1 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
16 years 1 months ago
A case for dynamic frequency tuning in on-chip networks
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...
DAMON
2009
Springer
16 years 1 months ago
Cache-conscious buffering for database operators with state
Database processes must be cache-efficient to effectively utilize modern hardware. In this paper, we analyze the importance of temporal locality and the resultant cache behavior ...
John Cieslewicz, William Mee, Kenneth A. Ross
SAT
2009
Springer
113views Hardware» more  SAT 2009»
16 years 1 months ago
Exploiting Cycle Structures in Max-SAT
We investigate the role of cycles structures (i.e., subsets of clauses of the form ¯l1 ∨ l2, ¯l1 ∨ l3, ¯l2 ∨ ¯l3) in the quality of the lower bound (LB) of modern MaxSAT ...
Chu Min Li, Felip Manyà, Nouredine Ould Moh...
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