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168
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ICCAD
2002
IEEE
16 years 3 months ago
2002
IEEE
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
195
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
160
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
209
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SOSP
2009
ACM
16 years 3 months ago
2009
ACM
Modern computer systems have been built around the assumption that persistent storage is accessed via a slow, block-based interface. However, new byte-addressable, persistent memo...
183
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FPGA
2010
ACM
16 years 3 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...