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VLSID
2004
IEEE
112views VLSI» more  VLSID 2004»
16 years 7 months ago
Designing Leakage Aware Multipliers
Power consumption has become a major design limiter. With the continued reduction of threshold voltages, optimizing leakage energy consumption is becoming increasingly important. ...
M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishn...
VLSID
2003
IEEE
145views VLSI» more  VLSID 2003»
16 years 7 months ago
Immediate Neighbor Difference IDDQ Test (INDIT) for Outlier Identification
Increasing values and spread in leakage current makes it impossible to distinguish between faulty and fault-free chips using single threshold method. Neighboring chips on a wafer ...
Sagar S. Sabade, D. M. H. Walker
STOC
2004
ACM
102views Algorithms» more  STOC 2004»
16 years 7 months ago
A simple polynomial-time rescaling algorithm for solving linear programs
The perceptron algorithm, developed mainly in the machine learning literature, is a simple greedy method for finding a feasible solution to a linear program (alternatively, for le...
John Dunagan, Santosh Vempala
ICCD
2003
IEEE
112views Hardware» more  ICCD 2003»
16 years 3 months ago
Power Efficient Data Cache Designs
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
Jaume Abella, Antonio González
ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
16 years 3 months ago
FPGA device and architecture evaluation considering process variations
Process variations in nanometer technologies are becoming an important issue for cutting-edge FPGAs with a multimillion gate capacity. Considering both die-to-die and withindie va...
Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He