Sciweavers

1476 search results - page 191 / 296
» Three-dimensional integrated circuits
Sort
View
DAC
2006
ACM
16 years 4 days ago
A reconfigurable design-for-debug infrastructure for SoCs
In this paper we present a Design-for-Debug (DFD) reconfigurable infrastructure for SoCs to support at-speed in-system functional debug. A distributed reconfigurable fabric insert...
Miron Abramovici, Paul Bradley, Kumar N. Dwarakana...
DAC
2006
ACM
16 years 4 days ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
AUTOID
2005
IEEE
15 years 11 months ago
Impedance Matching Concepts in RFID Transponder Design
In this paper, we analyze impedance matching concepts in passive radio frequency identification (RFID) transponders, which are powered by the incoming RF energy and consist of an...
K. V. S. Rao, Pavel V. Nikitin, Sander F. Lam
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
15 years 11 months ago
Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters
This paper suggests a practical “hybrid” synthesis methodology which integrates designer-derived analytical models for system-level description with simulation-based models at...
Yu-Tsun Chien, Dong Chen, Jea-Hong Lou, Gin-Kou Ma...
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
15 years 11 months ago
Energy Bounds for Fault-Tolerant Nanoscale Designs
- The problem of determining lower bounds for the energy cost of a given nanoscale design is addressed via a complexity theory-based approach. This paper provides a theoretical fra...
Diana Marculescu