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ICCAD
2001
IEEE
74views Hardware» more  ICCAD 2001»
16 years 3 months ago
Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect
Interconnect structures including dielectrics can be modeled by an integral equation method using volume currents and surface charges for the conductors, and volume polarization c...
Luca Daniel, Alberto L. Sangiovanni-Vincentelli, J...
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
16 years 3 months ago
Multigrid-Like Technique for Power Grid Analysis
— Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on ...
Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
16 years 3 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz
ISQED
2010
IEEE
194views Hardware» more  ISQED 2010»
16 years 1 months ago
Accelerating trace computation in post-silicon debug
— Post-silicon debug comprises a significant and highly variable fraction of the total development time for large chip designs. To accelerate post-silicon debug, BackSpace [1, 2...
Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aam...
ISQED
2009
IEEE
137views Hardware» more  ISQED 2009»
16 years 1 months ago
Active decap design considerations for optimal supply noise reduction
Active decoupling capacitors (decaps) are more effective than passive decaps at reducing local IR-drop problems in the power distribution network. In the basic active decap, two p...
Xiongfei Meng, Resve A. Saleh