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CAV
2000
Springer
187views Hardware» more  CAV 2000»
15 years 10 months ago
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
In this paper we show how to do symbolic model checking using Boolean Expression Diagrams (BEDs), a non-canonical representation for Boolean formulas, instead of Binary Decision Di...
Poul Frederick Williams, Armin Biere, Edmund M. Cl...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
15 years 10 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
15 years 10 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi
GRID
2000
Springer
15 years 10 months ago
An Advanced User Interface Approach for Complex Parameter Study Process Specification on the Information Power Grid
The creation of parameter study suites has recently become a more challenging problem as the parameter studies have become multi-tiered and the computational environment has becom...
Maurice Yarrow, Karen M. McCann, Rupak Biswas, Rob...
ICS
2000
Tsinghua U.
15 years 10 months ago
Automatic loop transformations and parallelization for Java
From a software engineering perspective, the Java programming language provides an attractive platform for writing numerically intensive applications. A major drawback hampering i...
Pedro V. Artigas, Manish Gupta, Samuel P. Midkiff,...
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