As the number of transistors on a chip doubles with every technology generation, the number of on-chip cores also increases rapidly, making possible in a foreseeable future to des...
The advent of multi-core embedded processors has brought along new challenges for embedded system design. This paper presents an efficient, battery aware, code partitioning techni...
We present a design space explorer for the space of experimental designs. For many design problems, design decisions are determined by the consequences of the design rather than i...
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
This paper shows how an architecture description notation that has support for timed events can be used to provide a meta-language for specifying exact communication semantics. Th...