We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
Most current interface designs require that the user focus their attention on them in order to be of value. However, as the price of computation falls, and computational capabilit...
Jeremy M. Heiner, Scott E. Hudson, Kenichiro Tanak...
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
In this paper, we describe a case study in usability engineering for Web3D learning systems and introduce a new step to the typical methods of the usability design. Pedagogical ap...
Felipe Bacim, Nicholas F. Polys, Jian Chen, Mehdi ...
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...