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CSFW
2008
IEEE
16 years 1 months ago
Information Flow in Systems with Schedulers
Abstract. The focus of work on information flow security has primarily been on definitions of security in asynchronous systems models. This paper considers systems with scheduler...
Ron van der Meyden, Chenyi Zhang
EMSOFT
2007
Springer
16 years 25 days ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...
IEEEPACT
2006
IEEE
16 years 21 days ago
Hardware support for spin management in overcommitted virtual machines
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
PPOPP
2006
ACM
16 years 18 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
TACAS
2005
Springer
108views Algorithms» more  TACAS 2005»
16 years 4 days ago
On Some Transformation Invariants Under Retiming and Resynthesis
Transformations using retiming and resynthesis operations are the most important and practical (if not the only) techniques used in optimizing synchronous hardware systems. Althoug...
Jie-Hong Roland Jiang