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IPPS
2005
IEEE
16 years 8 days ago
IPSec Implementation on Xilinx Virtex-II Pro FPGA and Its Application
In this paper, we propose an IPSec implementation on Xilinx Virtex-II Pro FPGA1 . We move the key management and negotiation into software function calls that run on the PowerPC p...
Jing Lu, John W. Lockwood
ISCA
2005
IEEE
88views Hardware» more  ISCA 2005»
16 years 8 days ago
Architecture for Protecting Critical Secrets in Microprocessors
We propose “secret-protected (SP)” architecture to enable secure and convenient protection of critical secrets for a given user in an on-line environment. Keys are examples of...
Ruby B. Lee, Peter C. S. Kwan, John Patrick McGreg...
ISCAS
2005
IEEE
95views Hardware» more  ISCAS 2005»
16 years 8 days ago
Area, power, and pin efficient bus transceiver using multi-bit-differential signaling
—This paper describes a new low-power, area and pin efficient alternative to differential encoding for high performance chip-to-chip and backplane signaling. The technique, calle...
Donald M. Chiarulli, Jason D. Bakos, Joel R. Marti...
ISCC
2005
IEEE
16 years 8 days ago
Towards Flexible Authorization Management
During the last years there have been a lot of proposals in the literature for systems that attempt to manage the process of trust establishment. However, the engineering details ...
Patroklos G. Argyroudis, Donal O'Mahony
ISQED
2005
IEEE
116views Hardware» more  ISQED 2005»
16 years 8 days ago
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...
Subhrajit Bhattacharya, John A. Darringer, Daniel ...
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