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GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
16 years 9 hour ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
ASPLOS
1996
ACM
15 years 10 months ago
A Quantitative Analysis of Loop Nest Locality
This paper analyzes and quantifies the locality characteristics of numerical loop nests in order to suggest future directions for architecture and software cache optimizations. Si...
Kathryn S. McKinley, Olivier Temam
ICSE
1998
IEEE-ACM
15 years 10 months ago
Non-Intrusive Object Introspection in C++: Architecture and Application
We describe the design and implementation of system architecture to support object introspection in C++. In this system, information is collected by parsing class declarations, an...
Tyng-Ruey Chuang, Y. S. Kuo, Chien-Min Wang
DATE
2007
IEEE
136views Hardware» more  DATE 2007»
16 years 22 days ago
Compositional specification of behavioral semantics
An emerging common trend in model-based design of embedded software and systems is the adoption of Domain-Specific Modeling Languages (DSMLs). While syntax metamodeling enables th...
Kai Chen 0003, Janos Sztipanovits, Sandeep Neema
ISORC
2005
IEEE
15 years 12 months ago
Self-Tuning Planned Actions Time to Make Real-Time SOAP Real
This paper proposes a new method for programming and controlling distributed tasks. Applications declare behavior patterns that are used to automatically predict and reserve resou...
Johannes Helander, Stefan B. Sigurdsson