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VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
15 years 10 months ago
A New Methodology for Concurrent Technology Development and Cell Library Optimization
To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...
Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, P...
COMCOM
2006
121views more  COMCOM 2006»
15 years 6 months ago
Interactive Transparent Networking: Protocol meta modeling based on EFSM
the extensibility and evolution of network services and protocols had become a major research issue in recent years. The 'programmable' and 'active' network par...
Javed I. Khan, Raid Zaghal
RTAS
2008
IEEE
16 years 26 days ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley
IPPS
2007
IEEE
16 years 24 days ago
Invited Paper: A Compile-time Cost Model for OpenMP
OpenMP has gained wide popularity as an API for parallel programming on shared memory and distributed shared memory platforms. It is also a promising candidate to exploit the emer...
Chunhua Liao, Barbara M. Chapman
TCSV
2008
120views more  TCSV 2008»
15 years 6 months ago
A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection
Abstract--This paper proposes a parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm and applied to the SLAM (...
Vanderlei Bonato, Eduardo Marques, George A. Const...