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IEEEPACT
2007
IEEE
16 years 25 days ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
CGO
2008
IEEE
16 years 1 months ago
Modulo scheduling for highly customized datapaths to increase hardware reusability
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott ...
HPDC
2000
IEEE
15 years 11 months ago
Robust Resource Management for Metacomputers
In this paper we present a robust software infrastructure for metacomputing. The system is intended to be used by others as a building block for large and powerful computational g...
Jörn Gehring, Achim Streit
LCPC
1998
Springer
15 years 10 months ago
A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality
We present a cache locality optimization technique that can optimize a loop nest even if the arrays referenced have different layouts in memory. Such a capability is required for a...
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhar...
TCAD
2008
119views more  TCAD 2008»
15 years 6 months ago
Energy and Performance Optimization of Demand Paging With OneNAND Flash
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
Yongsoo Joo, Yongseok Choi, Jaehyun Park, Chanik P...