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ISHPC
2003
Springer
15 years 11 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
ENTCS
2002
84views more  ENTCS 2002»
15 years 6 months ago
Programming Autonomous Robots in Curry
In this paper we present a framework to program autonomous robots in the declarative multi-paradigm language Curry. This is an experiment to use high-level declarative programming...
Michael Hanus, Klaus Höppner
CASES
2005
ACM
15 years 8 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
RTCSA
2006
IEEE
16 years 17 days ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue
TASE
2010
IEEE
15 years 1 months ago
Intelligent Component-Based Automation of Baggage Handling Systems With IEC 61499
Airport Baggage Handling is a field of automation systems that is currently dependent on centralised control systems and conventional automation programming techniques. In this and...
Geoff Black, Valeriy Vyatkin