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ARCS
2008
Springer
15 years 8 months ago
An Optimized ZGEMM Implementation for the Cell BE
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
Timo Schneider, Torsten Hoefler, Simon Wunderlich,...
ICSM
2003
IEEE
15 years 12 months ago
Library Miniaturization Using Static and Dynamic Information
Moving to smaller libraries can be considered as a relevant task when porting software systems to limited-resource devices (e.g., hand-helds). Library miniaturization will be part...
Giuliano Antoniol, Massimiliano Di Penta
IPSN
2004
Springer
15 years 12 months ago
Constraint-guided dynamic reconfiguration in sensor networks
This paper presents an approach for dynamic software reconfiguration in sensor networks. Our approach utilizes explicit models of the design space of the embedded application. The...
Sachin Kogekar, Sandeep Neema, Brandon Eames, Xeno...
LCTRTS
2001
Springer
15 years 11 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
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CGO
2005
IEEE
16 years 7 days ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein