Sciweavers

3146 search results - page 230 / 630
» The use of compiler optimizations for embedded systems softw...
Sort
View
ICS
1999
Tsinghua U.
15 years 10 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
CODES
2004
IEEE
15 years 10 months ago
Design and programming of embedded multiprocessors: an interface-centric approach
We present design technology for the structured design and programming of embedded multi-processor systems. It comprises a task-level interface that can be used both for developin...
Pieter van der Wolf, Erwin A. de Kock, Tomas Henri...
ASPDAC
2009
ACM
150views Hardware» more  ASPDAC 2009»
16 years 1 months ago
Using a dataflow abstracted virtual prototype for HdS-design
Dataflow abstracted Virtual Prototype for HdS-Design Wolfgang Ecker Stefan Heinen Michael Velten Infineon Technologies AG Germany ASPDAC 2009 Special Session Hardware-dependent Sof...
Wolfgang Ecker, Stefan Heinen, Michael Velten
CGO
2005
IEEE
16 years 4 days ago
Maintaining Consistency and Bounding Capacity of Software Code Caches
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
Derek Bruening, Saman P. Amarasinghe
EMSOFT
2007
Springer
16 years 20 days ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer