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ECRTS
1998
IEEE
15 years 10 months ago
Using exact feasibility tests for allocating real-time tasks in multiprocessor systems
This paper introduces improvements in partitioning schemes for multiprocessor real-time systems which allow higher processor utilization and enhanced schedulability by using exact...
Sergio Saez, Joan Vila i Carbó, Alfons Cres...
CSREAESA
2006
15 years 8 months ago
Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
VLSISP
2008
123views more  VLSISP 2008»
15 years 6 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
ISSRE
2000
IEEE
15 years 11 months ago
Building Trust into OO Components Using a Genetic Analogy
Despite the growing interest for component-based systems, few works tackle the question of the trust we can bring into a component. This paper presents a method and a tool for bui...
Benoit Baudry, Vu Le Hanh, Jean-Marc Jéz&ea...
WIESS
2000
15 years 7 months ago
Stub-Code Performance Is Becoming Important
As IPC mechanisms become faster, stub-code efficiency becomes a performance issue for local client/server RPCs and inter-component communication. Inefficient and unnecessary compl...
Andreas Haeberlen, Jochen Liedtke, Yoonho Park, La...