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EUROPAR
2010
Springer
15 years 7 months ago
Optimized Dense Matrix Multiplication on a Many-Core Architecture
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
Elkin Garcia, Ioannis E. Venetis, Rishi Khan, Guan...
CGO
2004
IEEE
15 years 10 months ago
A Compiler Scheme for Reusing Intermediate Computation Results
Recent research has shown that programs often exhibit value locality. Such locality occurs when a code segment, although executed repeatedly in the program, takes only a small num...
Yonghua Ding, Zhiyuan Li
POPL
2008
ACM
16 years 6 months ago
Formal verification of translation validators: a case study on instruction scheduling optimizations
Translation validation consists of transforming a program and a posteriori validating it in order to detect a modification of its semantics. This approach can be used in a verifie...
Jean-Baptiste Tristan, Xavier Leroy
WCRE
2002
IEEE
15 years 11 months ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz
CODES
2007
IEEE
16 years 24 days ago
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek ...
Seunghoon Kim, Robert P. Dick, Russ Joseph