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HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
15 years 10 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
GLOBECOM
2009
IEEE
15 years 10 months ago
A Simple Greedy Algorithm for Link Scheduling with the Physical Interference Model
—In wireless networks, mutual interference prevents wireless devices from correctly receiving packages from others and becomes one of the challenges in the design of protocols fo...
Dejun Yang, Xi Fang, Nan Li, Guoliang Xue
MASCOTS
2004
15 years 8 months ago
Simulation Evaluation of Hybrid SRPT Scheduling Policies
This paper uses trace-driven simulations to evaluate two novel Web server scheduling policies called KSRPT and T-SRPT. K-SRPT is a multi-threaded version of SRPT (Shortest Remaini...
Mingwei Gong, Carey L. Williamson
PSTV
1992
113views Hardware» more  PSTV 1992»
15 years 7 months ago
Coverage Preserving Reduction Strategies for Reachability Analysis
We study the effect of three new reduction strategies for conventional reachability analysis, as used in automated protocol validation algorithms. The first two strategies are imp...
Gerard J. Holzmann, Patrice Godefroid, Didier Piro...
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
15 years 7 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens