Sciweavers

4440 search results - page 82 / 888
» The space of design
Sort
View
GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
15 years 11 months ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
TWC
2008
150views more  TWC 2008»
15 years 6 months ago
Combining Beamforming and Space-Time Coding Using Quantized Feedback
We combine space-time coding and transmit beamforming over multiple-antenna quasi-static fading channels using resolution-constrained channel state information at the transmitter ...
Siavash Ekbatani, Hamid Jafarkhani
ISCA
2010
IEEE
314views Hardware» more  ISCA 2010»
15 years 11 months ago
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay...
ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
16 years 3 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
FMCAD
2008
Springer
15 years 8 months ago
BackSpace: Formal Analysis for Post-Silicon Debug
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steve...