We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohamma...
This paper introduces thread integration, a new method of providing low-cost concurrency for microcontrollers and microprocessors. This post-pass compiler technology effectively i...
Information visualization encounters a wide variety of different data domains. The visualization community has developed representation methods and interactive techniques. As a co...
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...