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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
CHI
2005
ACM
16 years 7 months ago
"I hear the pattern": interactive sonification of geographical data patterns
In this paper we describe our investigation of using interactive sonification (non-speech sound) to present the geographical distribution pattern of statistical data to vision imp...
Haixia Zhao, Catherine Plaisant, Ben Shneiderman
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
16 years 1 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
ESANN
2007
15 years 8 months ago
Learning topology of a labeled data set with the supervised generative gaussian graph
Abstract. Discovering the topology of a set of labeled data in a Euclidian space can help to design better decision systems. In this work, we propose a supervised generative model ...
Pierre Gaillard, Michaël Aupetit, Géra...
ICCAD
2005
IEEE
105views Hardware» more  ICCAD 2005»
16 years 3 months ago
Response shaper: a novel technique to enhance unknown tolerance for output response compaction
The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a...
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Cha...