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148
Voted
ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
174
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ISMAR
2002
IEEE
15 years 11 months ago
2002
IEEE
We conducted two experiments comparing users’ communication behaviors of co-located users in collaborative augmented reality (AR) interfaces. In the first experiment, we compare...
227
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EURODAC
1995
IEEE
15 years 10 months ago
1995
IEEE
The paper presents an approach for performance and complexity analysis of hardware/software implementations for real-time systems on every stage of the partitioning. There are two...
188
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
166
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ASYNC
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...