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DAC
2004
ACM
16 years 7 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
ICCAD
2003
IEEE
190views Hardware» more  ICCAD 2003»
16 years 3 months ago
IDAP: A Tool for High Level Power Estimation of Custom Array Structures
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
NOMS
2008
IEEE
181views Communications» more  NOMS 2008»
16 years 20 days ago
Coordinated management of power usage and runtime performance
— With the continued growth of computing power and reduction in physical size of enterprise servers, the need for actively managing electrical power usage in large datacenters is...
Malgorzata Steinder, Ian Whalley, James E. Hanson,...
ISLPED
2003
ACM
83views Hardware» more  ISLPED 2003»
15 years 11 months ago
Leakage power modeling and optimization in interconnection networks
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Xuning Chen, Li-Shiuan Peh
TOOLS
1999
IEEE
15 years 10 months ago
Component Frameworks - A Case Study
This paper reports on an effort to use both the system theoretic DEVS (discrete event simulation) formalism and the JavaBeans component model as a basis for a componentbased discr...
Herbert Praehofer, Johannes Sametinger, Alois Stri...