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VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
16 years 6 months ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...
ISLPED
2000
ACM
68views Hardware» more  ISLPED 2000»
15 years 10 months ago
Speeding up power estimation of embedded software
Power is increasingly becoming a design constraint for embedded systems. A processor is responsible for energy consumption on account of the software component of the embedded sys...
Akshaye Sama, J. F. M. Theeuwen, M. Balakrishnan
EUROSSC
2006
Springer
15 years 9 months ago
Embedded Intelligence: Enabling In-Situ Power Management for Wireless Sensor Networks
Effective and efficient power management remains one of the most formidable obstacles that must be overcome before Wireless Sensor Networks can be deployed on a widespread basis. E...
Rui Ma, Gregory M. P. O'Hare, Michael J. O'Grady
ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
16 years 3 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...
DATE
2008
IEEE
170views Hardware» more  DATE 2008»
16 years 20 days ago
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
Duo Li, Sheldon X.-D. Tan, Bruce McGaughy