We address the problem of distributed source coding, i.e. compression of correlated sources that are not co-located and/or cannot communicatewith each other to minimize their join...
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...
The dramatically increasing size of polygonal models resulting from 3D scanning devices and advanced modeling techniques requires new approaches to reduce the load of geometry tran...