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CHES
2009
Springer
150views Cryptology» more  CHES 2009»
16 years 1 months ago
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been p...
Francesco Regazzoni, Alessandro Cevrero, Fran&cced...
IPSN
2009
Springer
16 years 1 months ago
Algebraic approach to recovering topological information in distributed camera networks
Camera networks are widely used for tasks such as surveillance, monitoring and tracking. In order to accomplish these tasks, knowledge of localization information such as camera l...
Edgar J. Lobaton, Parvez Ahammad, Shankar Sastry
CSE
2009
IEEE
16 years 1 months ago
A Network-Aware Distributed Membership Protocol for Collaborative Defense
— To counteract current trends in network malware, distributed solutions have been developed that harness the power of collaborative end-host sensors. While these systems greatly...
David Zage, Carl Livadas, Eve M. Schooler
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
16 years 1 months ago
Latency criticality aware on-chip communication
—Packet-switched interconnect fabric is a promising on-chip communication solution for many-core architectures. It offers high throughput and excellent scalability for on-chip da...
Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe S...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
16 years 1 months ago
Masking timing errors on speed-paths in logic circuits
There is a growing concern about timing errors resulting from design marginalities and the effects of circuit aging on speed-paths in logic circuits. This paper presents a low ove...
Mihir R. Choudhury, Kartik Mohanram