We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
—In this paper, a wireless cognitive radio sensor network is considered, where each sensor node is equipped with cognitive radio and the network is a multi-carrier system operati...
— Space-time codes from complex orthogonal designs (CODs) with no zero entries offer low Peak to Average power ratio (PAPR) and avoid the problem of turning off antennas. But COD...
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard Da...
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...