2916 search results - page 212 / 584 » The simulation power of automod |
154
click to vote
ICC
2007
IEEE
16 years 25 days ago
2007
IEEE
—In this paper, a novel peak power reduction scheme based on trellis shaping is proposed for single-carrier pulseshaped phase shift keying (PSK) systems. The use of PSK generally...
166
click to vote
DATE
2006
IEEE
16 years 17 days ago
2006
IEEE
This paper reports a high speed and low power consumption direct–indirect bootstrapped full–swing CMOS inverter driver circuit (bfi–driver). The simulation results, based o...
155
click to vote
ASPDAC
2006
ACM
16 years 14 days ago
2006
ACM
In this paper, a new flip-flop called Double-edge triggered Feedback Flip-Flop (DFFF) is proposed. The dynamic power consumption of DFFF is reduced by avoiding unnecessary interna...
137
click to vote
GLVLSI
2005
IEEE
16 years 3 days ago
2005
IEEE
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
135
click to vote
ISLPED
1996
ACM
15 years 10 months ago
1996
ACM
The power versus frequency performance of a micropipelined conventional CMOS logic family is compared with that of three similarly pipelined energy-recovering logic families. Usin...