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CODES
2011
IEEE
14 years 6 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
16 years 3 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
IPSN
2010
Springer
16 years 1 months ago
User-centric radio power control for opportunistic mountain hiking networks
bstract: User-Centric Radio Power Control for Opportunistic Mountain Hiking Networks ∗ Jyh-How Huang1 , Po-Yen Lin1 , Yu-Te Huang2 , Seng-Yong Lau1 , Ling-Jyh Chen2 , Kun-chan La...
Jyh-How Huang, Po-Yen Lin, Yu-Te Huang, Seng-Yong ...
ISLPED
2009
ACM
178views Hardware» more  ISLPED 2009»
16 years 1 months ago
Power management in energy harvesting embedded systems with discrete service levels
Power management has been a critical issue in the design of embedded systems due to the limited power supply. To prolong the lifetime, energy minimization has been studied under p...
Clemens Moser, Jian-Jia Chen, Lothar Thiele
ICPPW
2007
IEEE
16 years 23 days ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu