In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
Hao Hua, Christopher Mineo, Kory Schoenfliess, Amb...
A fully learning-based framework has been presented for deformable registration of MR brain images. In this framework, the entire brain is first adaptively partitioned into a numbe...