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ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
16 years 25 days ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...
KBSE
2007
IEEE
16 years 25 days ago
Directed test generation using symbolic grammars
We present CESE, a tool that combines exhaustive enumeration of test inputs from a structured domain with symbolic execution driven test generation. We target programs whose valid...
Rupak Majumdar, Ru-Gang Xu
EUC
2007
Springer
16 years 21 days ago
A Selective Push Algorithm for Cooperative Cache Consistency Maintenance over MANETs
Cooperative caching is an important technique to support efficient data dissemination and sharing in Mobile Ad hoc Networks (MANETs). In order to ensure valid data access, the cach...
Yu Huang 0002, Beihong Jin, Jiannong Cao, Guangzho...
ICDCS
2006
IEEE
16 years 18 days ago
PRINS: Optimizing Performance of Reliable Internet Storages
Distributed storage systems employ replicas or erasure code to ensure high reliability and availability of data. Such replicas create great amount of network traffic that negative...
Qing Yang, Weijun Xiao, Jin Ren
INFOCOM
2006
IEEE
16 years 17 days ago
DS-PPS: A Practical Framework to Guarantee Differentiated QoS in Terabit Routers with Parallel Packet Switch
—Parallel Packet Switch (PPS) is used intensively in today’s terabit router to construct the switching fabric. Basic PPS equally deals with all of the traffic in order to achie...
Lei Shi, Bin Liu, Wenjie Li, Beibei Wu, Yunhao Liu