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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
16 years 11 days ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
SIGIR
2004
ACM
16 years 5 days ago
On scaling latent semantic indexing for large peer-to-peer systems
The exponential growth of data demands scalable infrastructures capable of indexing and searching rich content such as text, music, and images. A promising direction is to combine...
Chunqiang Tang, Sandhya Dwarkadas, Zhichen Xu
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
16 years 1 days ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 11 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
15 years 11 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson