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214
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CODES
2005
IEEE
16 years 15 days ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
210
Voted
WWW
2008
ACM
16 years 7 months ago
2lip: the step towards the web3d
The World Wide Web allows users to create and publish a variety of resources, including multimedia ones. Most of the contemporary best practices for designing web interfaces, howe...
Jacek Jankowski, Sebastian Ryszard Kruk
184
Voted
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 3 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
158
Voted
CHI
2010
ACM
16 years 1 months ago
Layered elaboration: a new technique for co-design with children
As technology for children becomes more mobile, social, and distributed, our design methods and techniques must evolve to better explore these new directions. This paper reports o...
Greg Walsh, Allison Druin, Mona Leigh Guha, Elizab...
186
Voted
GLOBECOM
2009
IEEE
16 years 1 months ago
MAC Protocol Engine for Sensor Networks
—We present a novel approach for Medium Access Control (MAC) protocol design based on protocol engine. Current way of designing MAC protocols for a specific application is based...
Sinem Coleri Ergen, Piergiuseppe Di Marco, Carlo F...