Sciweavers

4344 search results - page 251 / 869
» The resourcefulness of everyday design
Sort
View
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 3 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
202
Voted
INFOCOM
2007
IEEE
16 years 26 days ago
Reduction of Quality (RoQ) Attacks on Dynamic Load Balancers: Vulnerability Assessment and Design Tradeoffs
—One key adaptation mechanism often deployed in networking and computing systems is dynamic load balancing. The goal from employing dynamic load balancers is to ensure that the o...
Mina Guirguis, Azer Bestavros, Ibrahim Matta, Yuti...
WSFM
2007
Springer
16 years 23 days ago
From Public Views to Private Views - Correctness-by-Design for Services
Service orientation is a means for integrating across diverse systems. Each resource, whether an application, system, or trading partner, can be accessed as a service. The resultin...
Wil M. P. van der Aalst, Niels Lohmann, Peter Mass...
DATE
2003
IEEE
137views Hardware» more  DATE 2003»
15 years 12 months ago
Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexa...
RTSS
1999
IEEE
15 years 11 months ago
Design and Evaluation of a Feedback Control EDF Scheduling Algorithm
Despite the significant body of results in real-time scheduling, many real world problems are not easily supported. While algorithms such as Earliest Deadline First, Rate Monotoni...
Chenyang Lu, John A. Stankovic, Gang Tao, Sang Hyu...