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VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
16 years 6 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
VLDB
2007
ACM
225views Database» more  VLDB 2007»
16 years 6 months ago
An Approach to Optimize Data Processing in Business Processes
In order to optimize their revenues and profits, an increasing number of businesses organize their business activities in terms of business processes. Typically, they automate imp...
Marko Vrhovnik, Holger Schwarz, Oliver Suhre, Bern...
ICSE
2004
IEEE-ACM
16 years 6 months ago
Design of Large-Scale Polylingual Systems
Abstract. Building systems from existing applications written in two or more languages is common practice. Such systems are polylingual. Polylingual systems are relatively easy to ...
Mark Grechanik, Don S. Batory, Dewayne E. Perry
ICCAD
2007
IEEE
107views Hardware» more  ICCAD 2007»
16 years 3 months ago
Computation of minimal counterexamples by using black box techniques and symbolic methods
— Computing counterexamples is a crucial task for error diagnosis and debugging of sequential systems. If an implementation does not fulfill its specification, counterexamples ...
Tobias Nopper, Christoph Scholl, Bernd Becker
CVPR
2010
IEEE
16 years 2 months ago
Parallel Graph-cuts by Adaptive Bottom-up Merging
Graph-cuts optimization is prevalent in vision and graphics problems. It is thus of great practical importance to parallelize the graph-cuts optimization using today’s ubiquitou...
Jiangyu Liu, Jian Sun