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PLDI
1999
ACM
15 years 11 months ago
Cache-Conscious Structure Layout
Hardware trends have produced an increasing disparity between processor speeds and memory access times. While a variety of techniques for tolerating or reducing memory latency hav...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
FAST
2010
15 years 8 months ago
BASIL: Automated IO Load Balancing Across Storage Devices
Live migration of virtual hard disks between storage arrays has long been possible. However, there is a dearth of online tools to perform automated virtual disk placement and IO l...
Ajay Gulati, Chethan Kumar, Irfan Ahmad, Karan Kum...
JIPS
2006
126views more  JIPS 2006»
15 years 6 months ago
TASL: A Traffic-Adapted Sleep/Listening MAC Protocol for Wireless Sensor Network
In this paper, we proposed a MAC protocol, which can dynamically adjust Listening/Sleeping time rate of wireless sensor nodes according to data traffic load. In sensor networks, se...
Yuan Yang, Zhen Fu, Tae-Seok Lee, Myong-Soon Park
INFOCOM
2010
IEEE
15 years 5 months ago
On the Fundamental Limits of Broadcasting in Wireless Mobile Networks
Abstract—In this paper, we investigate the fundamental properties of broadcasting in mobile wireless networks. In particular, we characterize broadcast capacity and latency of a ...
Giovanni Resta, Paolo Santi
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
15 years 4 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...