2605 search results - page 468 / 521 » The many levels of CSCL |
162
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FPGA
1995
ACM
15 years 9 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
227
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ICIP
1997
IEEE
15 years 9 months ago
1997
IEEE
A novel algorithm is described for coding objects in video compression systems which gives complete control over the bit allocation to the video objects. The method is evaluated b...
163
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ICCAD
1995
IEEE
15 years 9 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
275
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SIGLEX
1991
15 years 9 months ago
1991
The lexical entry for a word must contain all the information needed to construct a semantic representation for sentences that contain the word. Because of that requirement, the f...
163
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VLDB
1987
ACM
15 years 9 months ago
1987
ACM
This paper reports on an implementation of Bayer's Time Interval concurrency control method and compares it to the performance of a conventional timestamp method. The impleme...