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MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 10 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
NSPW
1998
ACM
15 years 10 months ago
Meta Objects for Access Control: a Formal Model for Role-Based Principals
Object-based programming is becoming more and more popular and is currently conquering the world of distributed programming models. In object-based systems access control is often...
Thomas Riechmann, Franz J. Hauck
IPPS
1997
IEEE
15 years 10 months ago
External Adjustment of Runtime Parameters in Time Warp Synchronized Parallel Simulators
Several optimizations to the Time Warp synchronization protocol for parallel discrete event simulation have been proposed and studied. Many of these optimizations have included so...
Radharamanan Radhakrishnan, Lantz Moore, Philip A....
BIRTHDAY
1997
Springer
15 years 10 months ago
Spatial and Temporal Structures in Cognitive Processes
The structures of space and time are identified as essential for the realization of cognitive systems. It is suggested that the omnipresence of space and time may have been respons...
Christian Freksa
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
15 years 10 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi