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» The many levels of CSCL
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CVPR
2004
IEEE
16 years 8 months ago
Atlanta World: An Expectation Maximization Framework for Simultaneous Low-Level Edge Grouping and Camera Calibration in Complex
Edges in man-made environments, grouped according to vanishing point directions, provide single-view constraints that have been exploited before as a precursor to both scene under...
Grant Schindler, Frank Dellaert
VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
16 years 6 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
HPCA
2008
IEEE
16 years 6 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
HPCA
2006
IEEE
16 years 6 months ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
PLDI
2010
ACM
16 years 3 months ago
Ur: Statically-Typed Metaprogramming with Type-Level Record Computation
Dependent types provide a strong foundation for specifying and verifying rich properties of programs through type-checking. The earliest implementations combined dependency, which...
Adam Chlipala