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» The many levels of CSCL
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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
16 years 3 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICCAD
2002
IEEE
124views Hardware» more  ICCAD 2002»
16 years 3 months ago
Symbolic pointer analysis
— One of the bottlenecks in the recent movement of hardware synthesis from behavioral C programs is the difficulty in reasoning about runtime pointer values at compile time. The...
Jianwen Zhu
SOSP
2003
ACM
16 years 3 months ago
Upgrading transport protocols using untrusted mobile code
In this paper, we present STP, a system in which communicating end hosts use untrusted mobile code to remotely upgrade each other with the transport protocols that they use to com...
Parveen Patel, Andrew Whitaker, David Wetherall, J...
ASPLOS
2010
ACM
16 years 1 months ago
Speculative parallelization using software multi-threaded transactions
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B....
CHI
2010
ACM
16 years 1 months ago
Bringing the field into focus: user-centered design of a patient expertise locator
Managing personal aspects of health is challenging for many patients, particularly those facing a serious condition such as cancer. Finding experienced patients, who can share the...
Andrea Civan-Hartzler, David W. McDonald, Chris Po...