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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 8 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
EMSOFT
2008
Springer
15 years 8 months ago
Volatiles are miscompiled, and what to do about it
C's volatile qualifier is intended to provide a reliable link between operations at the source-code level and operations at the memorysystem level. We tested thirteen product...
Eric Eide, John Regehr
BIOCOMP
2007
15 years 8 months ago
Stability Analysis of Genetic Regulatory Network with Additive Noises
Background: Genetic regulatory networks (GRN) can be described by differential equations with SUM logic which has been found in many natural systems. Identification of the network...
Yufang Jin
LREC
2010
168views Education» more  LREC 2010»
15 years 8 months ago
Balancing SoNaR: IPR versus Processing Issues in a 500-Million-Word Written Dutch Reference Corpus
In The Low Countries, a major reference corpus for written Dutch is currently being built. In this paper, we discuss the interplay between data acquisition and data processing dur...
Martin Reynaert, Nelleke Oostdijk, Orphée D...
FLAIRS
2006
15 years 7 months ago
The ASSISTment Builder: Towards an Analysis of Cost Effectiveness of ITS Creation
Intelligent Tutoring Systems, while effective at producing student learning [2,7], are notoriously costly to construct [1,9], and require PhD level experience in cognitive science...
Neil T. Heffernan, Terrence E. Turner, Abraao L. N...