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» The many levels of CSCL
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PPOPP
2010
ACM
16 years 3 months ago
Scaling LAPACK panel operations using parallel cache assignment
In LAPACK many matrix operations are cast as block algorithms which iteratively process a panel using an unblocked algorithm and then update a remainder matrix using the high perf...
Anthony M. Castaldo, R. Clint Whaley
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
16 years 3 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
16 years 3 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
CVPR
2010
IEEE
16 years 2 months ago
Linked Edges as Stable Region Boundaries
Many of the recently popular shape based category recognition methods require stable, connected and labeled edges as input. This paper introduces a novel method to find the most st...
Michael Donoser, Hayko Riemenschneider and Horst B...
ASPLOS
2010
ACM
16 years 1 months ago
The Scalable Heterogeneous Computing (SHOC) benchmark suite
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
Anthony Danalis, Gabriel Marin, Collin McCurdy, Je...