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ISCA
1998
IEEE
142views Hardware» more  ISCA 1998»
15 years 10 months ago
An Analysis of Correlation and Predictability: What Makes Two-Level Branch Predictors Work
Pipeline flushes due to branch mispredictions is one of the most serious problems facing the designer of a deeply pipelined, superscalar processor. Many branch predictors have bee...
Marius Evers, Sanjay J. Patel, Robert S. Chappell,...
DAC
1997
ACM
15 years 10 months ago
Power Macromodeling for High Level Power Estimation
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
Subodh Gupta, Farid N. Najm
HPCA
1996
IEEE
15 years 10 months ago
Protected, User-Level DMA for the SHRIMP Network Interface
Traditional DMA requires the operating system to perform many tasks to initiate a transfer, with overhead on the order of hundreds or thousands of CPU instructions. This paper des...
Matthias A. Blumrich, Cezary Dubnicki, Edward W. F...
CGI
2004
IEEE
15 years 10 months ago
Point Set Surface Editing Techniques Based on Level-Sets
In this paper we articulate a new modeling paradigm for both local and global editing on complicated point set surfaces of arbitrary topology. In essence, the proposed technique l...
Xiaohu Guo, Jing Hua, Hong Qin
MICRO
1995
IEEE
140views Hardware» more  MICRO 1995»
15 years 9 months ago
A system level perspective on branch architecture performance
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald, Joel S. Emer