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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 7 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 7 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
16 years 7 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...
HPCA
2004
IEEE
16 years 7 months ago
Hardware Support for Prescient Instruction Prefetch
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wan...
CHI
2004
ACM
16 years 7 months ago
Impact of interruption style on end-user debugging
Although researchers have begun to explicitly support enduser programmers' debugging by providing information to help them find bugs, there is little research addressing the ...
T. J. Robertson, Shrinu Prabhakararao, Margaret M....
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