15351 search results - page 627 / 3071 » The information bottleneck method |
198
click to vote
ECCV
2010
Springer
16 years 17 days ago
2010
Springer
This paper presents algorithms for efficiently computing the covariance matrix for features that form sub-windows in a large multidimensional image. For example, several image proc...
201
click to vote
DATE
2010
IEEE
16 years 16 days ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
187
click to vote
IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processo...
217
click to vote
SSDBM
2000
IEEE
15 years 11 months ago
2000
IEEE
In a previous paper [Shoshani et al 99], we described a system called STACS (Storage Access Coordination System) for High Energy and Physics (HEP) experiments. These experiments g...
182
click to vote
ICCAD
1999
IEEE
15 years 11 months ago
1999
IEEE
Available techniques for testing core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesising low-overhead test architectures and compact test solutions....