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ASPDAC
2007
ACM
100views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning
- For modern processor designs in nanometer technologies, both block and interconnect pipelining are needed to achieve multi-gigahertz clock frequency, but previous approaches cons...
Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong,...
CASES
2007
ACM
15 years 10 months ago
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
Chengmo Yang, Alex Orailoglu
CASES
2007
ACM
15 years 10 months ago
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter
DOCENG
2007
ACM
15 years 10 months ago
Thresholding of badly illuminated document images through photometric correction
This paper presents a document image thresholding technique that binarizes badly illuminated document images by the photometric correction. Based on the observation that illuminat...
Shijian Lu, Chew Lim Tan
PETRA
2010
ACM
15 years 10 months ago
Context-aware optimized information dissemination in large scale vehicular networks
Context-aware inter-vehicular communication is considered to be vital for inducing intelligence through the use of embedded computing devices inside vehicles. Vehicles in a scalab...
Yves Vanrompay, Ansar-Ul-Haque Yasar, Davy Preuven...
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